达摩院-Video Algorithm-Architecture Co-Design Scientist-北京
We are Alibaba DAMO Academy, which is dedicated to exploring the unknown through scientific and technological research and innovation. The driving force behind the Academy is the pursuit of the betterment of humanity.
Our Computing Technology Lab is located in Sunnyvale, CA, the heart of Silicon Valley. We are the bridge of global talents and technologies to our corporate headquartered in China.
Our current focus areas include advanced research topics in computing, memory/storage, and interconnect technologies that can revolutionize today's computing systems with holistic innovations ranging from system architectures to VLSI designs, to enable new computing capabilities for improving energy efficiency and performance across multiple application domains, including both high-performance and embedded computing.
We are looking for strong candidates of video algorithm-architecture co-design, in particular, video compression/decompression, computer vision algorithm/architecture researchers to develop the next-generation hardware for the energy-efficient Internet ofVideo Things. We are highly interested in the interaction between computer vision and video compression, e.g., AI-aware compression, AI-assisted compression, AI-based compression, compression-aware CV, compression-assisted CV, and compression-based CV. The team needs experts in 3 areas to co-design video codec algorithms, computer vision algorithms, and accelerator architecture. First priority will go to researchers who have experiences and interests in all 3 areas. Second priority will go to who have experiences and interests in 2 of the 3 areas. Nonetheless, we will consider strong experts in one of the areas but have interests in working with other researchers in other areas.
You will be part of a world-class team, led by veteran Silicon Valley senior executives and technical experts!
The responsibilities of this position include, but not limited to:
1. Research and develop advanced video algorithms and associated hardware architecture
2. Model and analyze the performance, quality, power, and/or area of advanced video algorithms and associated hardware architecture
3. Optimize the accelerator architecture designs based on the emerging trend of the video encoding/decoding/transcoding and computer vision algorithms
4. Optimize video encoding/decoding/transcoding algorithms, based on the characteristics of the hardware accelerators, with the help of AI, for example,
a. Optimize video encoding/transcoding algorithms and/or architecture, where the encoded video is to be consumed by the computer vision algorithms instead of human
b. Optimize video encoding/transcoding algorithms and/or architecture, with the help of AI
c. Develop new video encoding/transcoding algorithms and/or architecture using deep learning
5. Collaborate with the FPGA implementation team and/or SoC design team
6. Collaborate with business units who deploy the solutions
Successful candidates should meet one or more of the following requirements:
1. Ph.D. degree in EE/CS or equivalent major, minimum of 2 years of industrial experiences
2. Experience in video/image compression, decompression, and processing
3. Experience in computer vision, in particular, deep-learning based
4. Experience in hardware architecture design
5. Excellent communication skills and self-motivated, team-working altitude.
6. Fluent English speaking and technical writing is a must.