In this role, you will work with software and hardware engineering groups to define the next-generation inter-chip network architecture for high-performance computing SOC in Data Center
Requirement of the Job
* Identifies the challenging problems, and evaluate the various solutions for next-generation data center Computing solutions.
* Gets strong influences on the shape of future products by advanced architecture design as the excellent interface between software and hardware
* Documents the high-level architecture specification that defines the inter-chip network subsystem for the cutting-edge cloud applications.
* Works closely with design, system, and verification team to bring up the subsystem
* Minimum Bachelar degree in Computer Science or Electronics Engineering; M.S. or Ph.D. is preferred
* Minimum of 5 years of experience on computer architecture design for proven silicons. Ethernet/Switch/RDMA/RoCE/Ethernet sub-domain is preferred
* Strong experience on Ethernet/RDMA/RoCE protocol and architecture design.
* Experience on one or more of the following areas: Cache, NOC, Coherency, Virtulization, Security, RAS, power management
* Good verbal and written skill for communication
* Hands-on experience on the performance simulation and analysis is a good plus
* Faimilar AMBA protocol, CPU, knowledgable about SerDes, Phy, participated the chip integration, Server grade design is a plus.